Name Memory Expansion Module ; Partno None ; Revision 02 ; Date 1/28/93 ; Designer Tom Bachmann ; Company Blue Earth Research ; Assembly None ; Location None ; Device G20V8 ; /* LATTICE GAL20V8 */ /************************************************************************/ /* This device controls memory access in the memory expansion module. */ /************************************************************************/ /** Inputs shown for 24 pin dip package **/ Pin 1 = CLOCKIN ; /* Used to latch SEL0-2 outputs */ Pin [2..9] = [A8..15] ; /* Address inputs A8 thru A15 */ Pin 10 = PSEN ; /* Program memory read control */ Pin 11 = RD ; /* Data memory read control */ Pin 13 = ENABLE ; /* Enables GAL output buffers */ Pin 14 = WPEN ; /* Write Protect Enable input */ Pin 23 = WR ; /* Data memory write control */ /** Outputs shown for 24 pin dip package **/ Pin 22 = CLOCKOUT ; /* Used to latch SEL0, 1, 2 */ Pin 21 = SEL0 ; /* Bank select output LSB */ Pin 20 = SEL1 ; /* Bank select output */ Pin 19 = SEL2 ; /* Bank select output MSB */ Pin 18 = WP1 ; /* Write protect out to Micro */ Pin 17 = !WR1 ; /* Gated memory write control */ Pin 16 = !OE ; /* Gated memory read control */ Pin 15 = !MEM ; /* Memory chip select signal */ /** Declarations and Intermediate Variable Definitions **/ Field Addr = [A8..15] ; /** Logic Equations **/ /* Micro-440 peripheral map: FF00H = ADC0848CCV A/D */ /* FE00H = RTC-72423B Clock */ CLOCKOUT = Addr:[F000..F700] & !WR ; SEL0.D = Addr:[F100] # Addr:[F300] # Addr:[F500] # Addr:[F700] ; SEL1.D = Addr:[F200] # Addr:[F300] # Addr:[F600] # Addr:[F700] ; SEL2.D = Addr:[F400..F700] ; MEM = Addr:[8000..BF00] ; WR1 = !WR & !WPEN ; WP1 = Addr:[4000..4D00] # Addr:[5000..7F00] ; OE = !RD # !PSEN ;